Design of low-offset low-power CMOS amplifier for biosensor application

A compacted and low-offset low-power CMOS amplifier for biosensor application is presented in this paper. It includes a low offset Op-Amp and a high precision current reference. With a novel continuoustime DC offset rejection scheme, the IC achieves lower offset voltage and lower power consumption compared to previous designs. This configuration rejects large DC offset and drift that exist at the skin-electrode interface without the need of external components. The proposed amplifier has been implemented in SMIC 0.18-μm 1P6M CMOS technology, with an active silicon area of 100 μm by 120 μm. The back-annotated simulation results demonstrated the circuit features the systematic offset voltage less than 80 μV, the offset drift about 0.27 μV/°C for temperature ranging from –30°C to 100°C and the total power dissipation consumed as low as 37.8 μW from a 1.8 V single supply. It dedicated to monitor low amplitude biomedical signals recording.